Desenvolvimento de um circuito aritmético em VHDL
Keywords:
FPGA, Circuito aritmético, VHDLAbstract
This paper describes an FPGA-based circuit that implements two arithmetical operations (+, -) and interacts
with a monitor and a touch panel connected to the FPGA. Functionality of the circuit has been described in VHDL. The VHDL specification was compiled and converted in Xilinx ISE 5.2i environment to a bitstream for FPGA. The designed circuit was tested in a FPGA Spartan-IIE XC2S300E, which is a primary reconfigurable component of TE-XC2SE board supplied by Trenz Electronics. The paper demonstrates some capabilities of VHDL and Xilinx ISE, as well as interaction features with external components.