Implementação de algoritmo de compressão e descompressão de dados para modelo de co-processamento baseado em FPGA’s

Abstract

The paper describes some results obtained within a final year project for LECT (Licenciatura em Engenharia
de Computadores e Telemática). The project is devoted to the design and optimization of FPGA-based co-processors for data extensive applications (such as solving combinatorial problems over discrete matrices). One particular problem that has been studied in detail is transferring high volume of data to an FPGA-based coprocessor and receiving the results from the co-processor, which can be coded very compactly. In order to reduce communication time, a technique of data compression/decompression has been employed in such a
way that a host computer compresses data and transfers them to an FPGA-based co-processor. The latter either decompresses them or handles the compressed records. The paper describes compression/decompression algorithms based on the slightly modified Huffman method, their implementation in C++ language and FPGA-based circuits that provide for the relevant decompression. All hardware has been designed from specification in Handel-C and implemented in FPGA XC2V1000-4 of Virtex-II family available on a RC200 prototyping board of Celoxica.