Development of a circuit in Handel-C for graphs representation

Abstract

This paper describes a circuit to be designed for processing graphs with up to 25 vertices. The circuit has been implemented in a FPGA Spartan-ZZ XC2S200 (the development board RC100 of Celoxica). A mouse and a monitor have been used for interactions with the circuit. The design has been performed in Celoxica [1] DK2 environment from a specification in Handel-C.