Implementação em FPGA de um ordenador numérico recursivo com interface gráfica
Keywords:
SDR, Ordenação, FPGA, DETIUA-S3, HFSM, VGA, PS2, RecursividadeAbstract
This paper demonstrates results of the project proposedwithin the discipline on reconfigurable digital systems. The objective was to implement a recursive data sorting algorithm in hardware which would communicate with a keyboard, to allow the user to input the initial data to be sorted, and a VGA monitor to output both the original unsorted data and the same data after the sorting algorithm. Since the used hardware description language (VHDL in particular) does not allow implementing recursive algorithms, a technique based on hierarchical finite state machines has been applied. The algorithm itself constructs a binary tree for further sorting using known methods, and then sorts the data on the basis of the binary tree. The work done intends to reassemble existing blocks (such as that needed for controlling a VGA monitor, entering data from a keyboard, supporting execution of recursive algorithms, etc.) and to complete a project which makes it possible to implement the considered sorting algorithm in an FPGA-based digital system. The FPGA synthesized hardware includes all the necessary components to implement the desired interfaces and algorithms.